1. Field of the Invention
The present invention relates to a photoelectric conversion apparatus and an image pickup system using the same.
2. Description of the Related Art
Image pickup apparatuses in which metal oxide semiconductor (MOS) type photoelectric conversion apparatuses are used are actively developed. MOS type photoelectric conversion apparatuses are typical photoelectric conversion apparatuses. Amplifier solid-state image pickup apparatuses are disclosed as an example.
In an amplifier solid-state image pickup apparatus, since the number of MOS transistors, for reading signals or processing signals, that are disposed in the photoelectric conversion area is large, the light receiving area tends to be narrow compared with that of a charge-coupled device (CCD) type solid-state image pickup apparatus.
In such a situation, structures in which the number of MOS transistors is reduced are considered so as to expand the light receiving area of a photoelectric conversion element. For example, a photoelectric conversion apparatus is disclosed in Japanese Patent Laid-Open No. 11-355668, in which pixels are selected row by row by controlling the drain potential of a reset MOS transistor. Moreover, another photoelectric conversion apparatus is disclosed in Japanese Patent Laid-Open No. 2005-005911, in which pixels are selected row by row by controlling, with a pixel power supply drive circuit, the drain potentials of a reset transistor and an amplifier transistor that are commonly connected.
However, although equivalent circuits and reading methods in the structures in which the number of MOS transistors is reduced are considered, layouts in a case where devices are actually formed are not thoroughly considered.
For example, in the photoelectric conversion apparatus disclosed in Japanese Patent Laid-Open No. 2005-005911, selection or non-selection of pixels is controlled by supplying a voltage to the drains of the reset transistor and the amplifier transistor using a selection line. However, an actual wiring layout is not thoroughly considered. For example, since a vertical output line for reading signals and a selection line are placed in parallel, correct signals may not be read because the selection line may be affected by a change in the potential of the vertical output line.
In view of such problems, in the present invention, the influence of noise between a line for supplying a voltage to the drain of a reset transistor and an output line is reduced.